Conventionally, as an output circuit of such an ALSTTL, there is one which is shown in page 15 of MITSUBISHI SEMICONDUCTORS DATA BOOK BIPOLAR DIGITAL IC &lt;ALSTTL&gt; of 1984.
FIG. 2 shows an output equivalent circuit of such an ALSTTL recited in this article. In FIG. 2, the reference numeral 1 designates a high voltage power supply terminal, the reference numeral 2 designates a low voltage power supply terminal, and the reference numeral 3 designates an output terminal. The reference numeral 4 designates a first transistor comprising a Schottky clamped npn transistor (hereinafter referred to as "SBDnpnTr") whose base receives an input signal and whose collector is connected to the high voltage power supply terminal 1 via a resistor 13. The reference numeral 6 designates a third transistor comprising a SBDnpnTr whose base is connected to the collector of the first transistor 4 and whose collector is connected to the high voltage power supply terminal 1 via a resistor 14. The reference numeral 7 designates a fourth transistor comprising a SBDnpnTr whose base is connected to the emitter of the third transistor 6, whose emitter is connected to the low voltage power supply terminal 2, and whose collector is connected to the output terminal 3. The reference numeral 8 designates a fifth transistor comprising a SBDnpnTr whose base is connected to the collector of the third transistor 6 and whose collector is connected to the high voltage power supply terminal 1 via a resistor 15. The reference numeral 9 designates a sixth transistor whose base is connected to the emitter of the fifth transistor 8, whose collector is connected to the collector of the fifth transistor 8, and whose emitter is connected to the output terminal 3.
The reference numeral 10 designates a pn diode whose anode is connected to the emitter of the first transistor 4, and whose cathode is connected to the low voltage power supply terminal 2. The reference numeral 11 designates a Schottky barrier diode whose anode is connected to the output terminal 3 and whose cathode is connected to the collector of the third transistor 6. The reference numeral 16 designates a resistor which is connected between the base and the emitter of the npn transistor 9. The reference numeral 19 designates a seventh transistor comprising a SBDnpnTr whose base is connected to the base of the fourth transistor 7 via a resistor 17, and whose collector is connected to the base of the fourth transistor 7 via a resistor 18.
The circuit will be operated as follows.
First of all, when a signal of high level is input to the base of the first transistor 4, the first transistor 4 and the pn diode 10 are turned ON, and as a result the third transistor 6 is turned OFF, and the seventh transistor 19 is transiently turned ON thereby to subtract the base charges of the fourth transistor 7. The fourth transistor 7 is thus turned OFF. Furthermore, the third transistor 6 is turned OFF, and the fifth and sixth transistors 8 and 9 are turned ON, and a current flows from the high voltage power supply terminal 1 to the output terminal 3 through the resistor 15, and the voltage of the output terminal 3 becomes high level.
On the other hand, when a signal of low level is input to the base of the first transistor 4, the first transistor 4 and the pn diode 10 are turned OFF, and as a result the third and the fourth transistors 6 and 7 are turned ON, and a current is absorbed from the output terminal 3, whereby the voltage of the output terminal 3 becomes low level. Then, the third transistor 6 is turned ON, and the fifth and sixth transistors 8 and 9 are turned OFF.
Herein, the first transistor 4 is turned ON when the signal applied to the base thereof is higher than the sum of the anode cathode voltage V.sub.F10 of the pn diode 10 and the base emitter voltage V.sub.BE4 of the first transistor 4, and it is turned OFF when it is lower than that.
By the way, in this circuit with such a construction when the third transistor 6 is turned OFF, the seventh transistor 19 is transiently turned ON, and the fourth transistor 7 is turned OFF. However, the time period while the seventh transistor 19 is turned ON from the OFF state is short, and the current value which flows through this transistor 19 is restricted by the resistor 18 even during the turned ON state, thereby resulting in a long transfer time of transferring the low or high level of the output which is a switching time of the circuit.